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Interrupt Handling

:: EPE Chat Zone ­:: ­Radio Bygones Message Board :: » EPE Forum Archives 2010 - » Archive through 15 December, 2014 » Interrupt Handling « Previous Next »

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techtach2
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Posted on Friday, 05 December, 2014 - 06:42 pm:   Edit Post Delete Post Print Post    Move Post (Moderator/Admin Only)

Hi
I noticed in the Jan 2015 issue of Mike Hibbett's PIC n Mix that his interrupt routine handles multiple sources, checking various flags.
I would suggest that he also adds the check for the enable, not just the interrupt flag, so

if(PIR1bits.TMR1IF && PIE1bits.TMR1IE)

as a better check to use. Checking just the interrupt flag can cause false triggers, as a single interrupt condition will cause all of the interrupt flags to be checked as the code usually flows right through the ISR. Disabling an interrupt by clearing it's enable bit will be ineffective.

This can be a difficult problem to track down when it occurs, and it is worth using this simple check to help avoid it.

TT2
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mikehibbett
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Posted on Friday, 05 December, 2014 - 07:24 pm:   Edit Post Delete Post Print Post    Move Post (Moderator/Admin Only)

Hi TT2,

I totally agree, and I've been caught out by mine and other people's casual implementations in that area. I chose not to to discuss it there so as to not complicate things too much.

Thanks for the clear explanation though, which I'm sure others will find useful.

Oh, and welcome to the CZ!

Mike.
-------------------
web: mjhdesigns.com twitter: mikehibbett YouTube Channel: http://goo.gl/6bzjov
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james
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Post Number: 445
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Posted on Friday, 05 December, 2014 - 07:37 pm:   Edit Post Delete Post Print Post    Move Post (Moderator/Admin Only)

Hi Colin,

I've been caught by that one before.

Interrupt request flags are set if an interrupt condition is met regardless of whether or not the interrupt enable bit is actually enabled.

So for instance if timer1 is running and rolls over its interrupt request flag is set even if the interrupt is not enabled.
Then if an enabled A to D interrupt vectors program execution to the ISR and the Timer1 interrupt request flag is tested before the A to D interrupt request flag, (not testing the timer1 interrupt enable flag as well) then the timer1 ISR will be run instead of the required A to D ISR.

Welcome to the Chatzone.

Cheers

James
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bowden_p
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Posted on Friday, 05 December, 2014 - 08:32 pm:   Edit Post Delete Post Print Post    Move Post (Moderator/Admin Only)

Hi Colin,
Well done for highlighting this shortcoming of the PIC Interrupt system. It is a pain with those peripherals which aren't selective, or cannot be switched off completely. I have in mind Timer 0, when clocked by the system clock, and its external clock pin is used as an I/O. You cannot stop the Timer, so it always generates its interrupt flag! A similar problem exists with IOC's on PORTB, where you can only have all or nothing on many devices.

With regards, Paul.
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techtach2
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Posted on Saturday, 06 December, 2014 - 11:11 am:   Edit Post Delete Post Print Post    Move Post (Moderator/Admin Only)

Thanks for the welcome guys.
I have been working with PICs for many years, and know them well, but I am amazed by the previously unknown detail I see in here, some of you guys are truly adroit! I will be hanging around!

TT2
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james
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Posted on Saturday, 06 December, 2014 - 01:01 pm:   Edit Post Delete Post Print Post    Move Post (Moderator/Admin Only)

Embarassed to say I had to google "adroit" to find out its meaning, but I think he's talking about you Paul!

Cheers

James
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bowden_p
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Posted on Saturday, 06 December, 2014 - 02:29 pm:   Edit Post Delete Post Print Post    Move Post (Moderator/Admin Only)

Hi All,
Many thanks for the compliment - but I think I should share it with all other knowledgeable folk who comment here. I most certainly don't "know it all" - there is plenty yet for me to learn!
( Like the recent query from Lincoln about IOC debouncing and Sleep. That got me thinking, as I had never seriously considered using Sleep in a project before.)

With regards, Paul.
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james
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Posted on Saturday, 06 December, 2014 - 02:56 pm:   Edit Post Delete Post Print Post    Move Post (Moderator/Admin Only)

Hi Paul,

Yes, that's one thing about electronics - you can work hard at it all one's life and you'll never know it all. And there's always someone who knows more about a certain electronic's topic than yourself. There's always something new to learn in Electronics. - Part of the appeal I suppose.

I learned a new word today - "adroit", I thought it meant "to the right" then I realised that's French!

Cheers

James

(Message edited by james on 06 December, 2014)
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techtach2
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Posted on Saturday, 06 December, 2014 - 03:02 pm:   Edit Post Delete Post Print Post    Move Post (Moderator/Admin Only)

:-) My boss used the word in my appraisal many years ago, and I thought it was going to be his way of saying 'not getting a pay rise', till I looked it up too!

Cheers

TT2
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zeitghost
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Posted on Tuesday, 09 December, 2014 - 03:32 pm:   Edit Post Delete Post Print Post    Move Post (Moderator/Admin Only)

Neat bit of info, thanks a lot, it had never struck me.

(By struck me, I mean, of course, bitten me on the unmentionables).
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atferrari
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Posted on Wednesday, 10 December, 2014 - 12:04 am:   Edit Post Delete Post Print Post    Move Post (Moderator/Admin Only)

With not intention to derail this thread but now in need of mentioning my dilemma:

If those (noticed the plural) unmentionables are exactly unmentionables how could I know what they are? Kind of a strange recursion, isn't it?

BTW, interrupts: when back to micros I will revisit that part for the 18F family. Sorry, not convinced yet.

(Message edited by atferrari on 10 December, 2014)
Agustín Tomás - Buenos Aires - Argentina

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